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Computation Structures >> Content Detail



Calendar / Schedule



Calendar

This calendar provides the main topics covered during each lecture (L), assignment due dates, quiz dates, and recitation dates (R).





WEEK # DAY 1DAY 2DAY 3DAY 4
1L1 - Course Overview and Mechanics. Basics of InformationR1
2L2 - Digital Abstraction, Combinational Logic, Voltage-Based EncodingR2L3 - CMOS Technology; Power and Performance IssuesR3
3L4 - Design of Logic Gates; TimingR4L5 - Canonical Logic Forms, Synthesis, Simplification
Lab #1 Due
R5
Quiz #1
4L6 - Storage Elements, State, Finite State MachineR6L7 - D-registers, FSM Example
Lab #2 Due
R7
5L8 - Synchronization, MetastabilityR8L9 - Pipelining; Throughput and Latency
Lab #3 Due
R9
6L10 - Case Study: MultipliersR10L11 - Models of Computation, Programmable ArchitecturesR11
Quiz #2
7R12L12 - Beta Instruction Set Architecture, Compilation
Lab #4 Due
R13
8L13 - Machine Language Programming IssuesR14L14 - Stacks and ProceduresR15
9L15 - Non-Pipelined Beta ImplementationR16L16 - Pipelined Beta Implementation, BypassingR17
Quiz #3
10L17 - Pipeline Issues: Delay Slots, Annulment, ExceptionsR18L18 - Multilevel Memories; Locality, Performance, Caches
Lab #5 Due
R19
11L19 - Case Study: Cache DesignR20L20 - Communication Issues: Busses, Networks, ProtocolsR21
Quiz #4
12L21 - Virtual Memory: Mapping, Protection, ContextsR22L22 - Virtual machines, OS Kernel Code, Supervisor Calls, Scheduling
Lab #6 Due
R23
13L23 - Communicating Processes: Semaphores, Synchronization, Atomicity, DeadlockR24
14L24 - Interrupts, Real TimeR25L25 - Parallel Processing, Shared Memory, Cache Coherence, Consistency CriteriaR26
Quiz #5
15L26 - Looking Ahead: Future Computer ArchitecturesLab #7 Due
 


 



 








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